Mixed Signal FPGAs

MLE's patent pending Mixed-Signal FPGA solutions make Delta-Sigma-Modulator technology applicable to your next Embedded System project.

When it comes to processing legacy data protocols FPGA offer very cost efficient alternatives to the – sometimes hard to get – original circuits. MLE's Mixed-Signal FPGA technology further broadens the application space from pure digital protocols to so-called “amplitude-modulated” protocols which require plenty of configurable analog I/Os embedded inside proven off-the-shelf FPGA devices.

Standard Approach	MLE Mixed Signal FPGA
Discrete active components required to extend the FPGA with analog I/Os Increased parts count and PCB footprint Additional effort required to ensure simultaneous time-synchronous data processing	No active peripheral components, analog I/Os are directly integrated into the FPGA Reduced parts count and PCB footprint Enables simultaneous and time-synchronous sampling, direct and straightforward

Standard Approach

MLE Mixed Signal FPGA

Discrete active components required to extend the FPGA with analog I/Os

Increased parts count and PCB footprint

Additional effort required to ensure simultaneous time-synchronous data processing

No active peripheral components, analog I/Os are directly integrated into the FPGA

Reduced parts count and PCB footprint

Enables simultaneous and time-synchronous sampling, direct and straightforward

Applications

Flexible data acquisition and monitoring systems
Cost-efficient embedded systems with many sensor inputs
Voltage-based actuator control, DC motor control
Audio Output – that FPGA sounds great!
Integrated microcontrollers with reduced risk of parts obsolescence
Amplitude-Modulated (AM) protocol processing, for example IRIG

Core Benefits

Reduce your hardware footprint and parts count
No active peripheral ICs required
Efficient post-processing with low FPGA resource cost.
Highly reconfigurable ADC/DAC parameter setting
Design flexibility: „one more I/O“
Greatly reduce costs when applying multitudes of analog I/O channels
Reasonable I/O precision, more than sufficient for most of today's analog applications in Embedded Systems
ADC sample rate: up to 200 kS/s
ADC resolution: up to 11 bits ENOB

Pricing

MLE provides a suite of Intellectual Property (IP) Cores, reference designs, and design tools within a Mixed-Signal design suite. This complements the "soft" ADCs and DACs with optimized-for digital signal filtering and conditioning which takes the burdon of parametrization away from the user.

MLE provides a three-phase product integration roadmap for new customers:

	Deliverables	Pricing
Requirements & Feasibility Analysis	Integration service into customer project; ‐ Option1: 1 parameterization, up to 6 channels; includes up to 5 engineering days ‐ Option2: up to 3 parametrizations, up to 12 channels; includes up to 10 engineering days	$6,650.- $13,300.-
Production License	IP license for one defined product; worldwide, fully paid up for, perpetual; up to 3 parametrizations, up to 33 channels per FPGA device family.	Please inquire!

Availability

The Mixed-Signal Field-Programmable Gate Array (FPGA) (as IP core or reference design) is available for the following FPGA families:

Products Availability Matrix

Datasheets and Documentation

Download the Mixed-Signal FPGA Product Brochure.

Please refer to these Technical Briefs to experience MLE's Mixed-Signal FPGA technology:

"Integrated ADC for Altera Cyclone-IV Devices"

"Integrated DAC for Altera Cyclone-IV Devices"

Missing Link Electronics