Servicing Amazon EC2 F1 Customers

Amazon Web Services (AWS) recently introduced the Amazon EC2 F1 instance, a compute instance with FPGA for custom hardware acceleration. MLE's mission is to de-risk the adoption of FPGA technology in new markets and applications by offering expert Design Services.

To fully support customers in their Amazon EC2 F1 projects MLE has been enabled by Xilinx and Amazon with sufficient seats for the required toolchain, and documentation to fully support users interested in FPGA acceleration in the cloud! Click here for more information.


 

MLE Releases New Zynq SSE

With full support for Xilinx Vivado Version 2016.4 and PetaLinux Version 2016.4, including a new Linux kernel 4.6 device API, this new Zynq SSE offering also comes with a more customer-focused license fee structure. This reflects MLE's dedication to the growing needs of embedded applications using Xilinx Zynq-7000 All Programmable SoC with SATA connected Solid-State Drives. Click here for more information.


 

Presentation at FPGA4GPC 2017

MLE presents first OS metrics for DTO-based DPR based on exemplary implementations of programmable accelerators for the Linux Kernel Crypto-API, implemented on the Xilinx Zynq 7000 platform at the FPGA4GPC (International Conference on FPGA Reconfiguration for General-Purpose Computing 2017) on 2017-05-09 & 2017-05-10. These metrics can guide future research on OSs forGPC on FPGAs. FPGA4GPC focusses on novel work in the field of reconfigurable systems optimized for the use in a general-purpose environment.


 

Robert Milton Gardner, January 31 1943 - April 11 2017

On April 11, MLE's President & COO passed away after serious illness. As a co-founder, role model and mentor at MLE Bob took a significant part in shaping the team with his leadership style, his deep interest in semiconductor technology and strong personality. We will always keep his memory in honor.


 

reVISION_Alliance Program Member

MLE joins the Xilinx reVision ecosystem. As a Design Service Partner to the Xilinx ecosystem, we have been actively supporting key innovators for computer vision in the automotive and industrial space in the US and in Europe.


 

Binarized Neural Network Application

MLE presents an Embedded Vision Robotics System with Accelerated Image Recognition at the Embedded World 2017. This industrial pick and place demonstration utilizes Binarized Neural Networks for machine vision recognition via programmable logic. This FPGA-based implementation accelerates image recognition while increasing recognition accuracy and reliability necessary for high performance, mission critical vision-enabled applications.


 

PXI Express over IP- a published article by MLE

German technical magazine, www.all-electronics.de, presents MLE's PXI Express over IP - new technology that enables the connection of PXI-Modules via existing Ethernet networks. Based on technology from German Fraunhofer HHI for accelerating TCP/IP via FPGA, this technology can "tunnel" PCIe-Transaction-Layer-Packages over TCP/IP. Read the full article here.


 

Programming Reconfigurable Devices

 MLE presents Programming Reconfigurable Devices via FPGA Regions & Device Tree Overlays at the FOSDEM 2017 on 2017-02-04 & 2017-02-05. FOSDEM is a free event for software developers to meet, share ideas and collaborate. Every year, thousands of developers of free and open source software from all over the world gather at the event in Brussels.

 (download slides) or visit our technical publications.


 

Embedded World Exhibition 2017

  14.-16.03.2017 - Exhibition Nuremberg  MLE partners with EMCOMO Solutions AG at Booth 4-478 in Hall 4. You will find us right behind Fraunhofer. In Addition to our exhibitions and free advices from our Engineers, MLE hosts a demo  at the Xilinx booth 1-205 in Hall 1 to showcase image  processing capability of FPGAs.


 

Low-Latency 10 Gig Ethernet Media Access Controller IP Core

The German Fraunhofer Heinrich-Hertz-Institute (HHI) partners with MLE to commmercialize and market HHI's proven network technology solutions. The Low-Latency 10 Gig Ethernet Media Access Controller IP Core enables high-bandwidth, low-latency Ethernet communication solutions for FPGA-based systems at 10Gbit/s line rate.