MLE Presents CORUNDUM In-Network Compute at FOSDEM'22

At FOSDEM'22, an annual event to promote the widespread use of free and open source software, MLE co-presents an update of the project. CORUNDUM is an open-source project hosted at Github for building high-performance FPGA-based Network-Interface Cards (NIC) or in-network compute platforms / SmartNICs. MLE's work includes enhanced support for Xilinx Zynq UltraScale+ MPSoC, for example interfacing with Linux running on the ARM-based Processing System (PS). Read more on the work presented...


DEC and MLE Collaborate on Multi-RAID SSD NVMe Streamer System

Today DEC (Defense Engineering Corporation, Beavercreek, OH USA) and MLE (Missing Link Electronics, Inc., San Jose, CA USA) announced they have collaborated to develop a high performance, Multi-RAID SSD Streaming System to incorporate into high performance data recording systems for the US Defense Dept. The system will be provided by DEC.

Dan Whitehead adds: “DEC is a Government Contractor working with the US Defense Dept. When we needed to develop a fast, SSD multi-RAID NVMe streamer for one of our projects, we became aware of Missing Link Electronics by way of Xilinx’s Premier Partners Program. This project required advanced knowledge of both specialized hardware and communication protocols to meet our customers exacting requirements. MLE came in, evaluated our needs, and developed the technical design using their own NVMe IP and in-depth hardware and software expertise to provide, on time and on budget, a board level solution to integrate into our system design. MLE provided unique benefit by having great access to our supplier’s technology, advanced IP, and specialized, hands-on expertise. I recommend MLE to others needing advanced expertise in programmable hardware and software design. Working with them is a pleasure and produces excellent results.”

Andreas Schuler, MLE Product Engineering, commented: “When we were approached by DEC we were happy to see that our long-time affiliation with the Xilinx Premier Partners Program provided a challenging opportunity to work with a top-notch engineering team at DEC. We were successfully able to combine our NVMe Streamer technology with DEC’s expertise in providing system-level technology to the US Defense Department. This produced an excellent result in which both companies take pride.”

DEC specializes in advanced sensor and processing technologies for Intelligence, Surveillance, and Reconnaissance (ISR), Unmanned Systems, and Self-Protection applications for the defense industry.

MLE is an intellectual property (IP) and software and hardware design services company based in San Jose, CA. It is a proud member of the Xilinx Premier Partners Program. MLE utilizes an extensive catalog of in-house developed IP for network connectivity, storage protocols and I/O interfaces for programmable platforms in its work. It develops solutions for international commercial, automotive, and Defense and Aerospace customers.


MLE Releases NPAP for MicroSemi PolarFire

In response to customer requests, MLE has ported NPAP-10G, the low-latency TCP/UDP/IP Full Accelerator for 10 Gigabit Ethernet to MicroSemi PolarFire FPGAs. MLE is now working with partner MicroSemi and a first customer to optimize NPAP-10G for sensor Edge Applications.


MLE Becomes Premier MicroSemi Design Partner

MLE has joined the Microchip Ecosystem as a Premier Design Partner. "Our customers have asked us to extend MLE's design services to include MicroSemi's FPGA families. In particular for industrial applications MicroSemi's PolarFire seems to provide a great combination of longterm availability, cost-efficiency and high-speed I/Os needed for PCIe and/or 10 Gigabit Ethernet.", says Endric Schubert, CTO and Co-Founder.


MLE Supports PCO with TCP/IP for Camera Systems

MLE has been providing to PCO a connectivity solution based on the Network Protocol Acceleration Platform from Fraunhofer HHI. The key objective is to scale along with increasing image sensor resolutions and frame rates and to provide reliable image transfers - using the well-known TCP/IP protocol - from FPGAs to standard server equipment with data rates up to 100 Gbps. Read more in this joint publication (German).


MLE Joins Github Project CORUNDUM for In-Network Compute is an open-source project hosted at Github for building high-performance FPGA-based Network-Interface Cards (NIC) or in-network compute platforms / SmartNICs. "Our motivation for joining is to build better and more cost-effective SmartNIC solutions by complementing FPGA Full Acceleration using NPAP, the TCP/IP Stack that I started at Fraunhofer HHI, with a performance oriented hardware/software infrastructure", says Ulrich Langenbach, Director Engineering at Missing Link Electronics. Engineering work plans include enhancing support for Xilinx Zynq UltraScale+ MPSoC and for porting CORUNDUM to some of MLE's partners' FPGA boards.


Wie Auto-TSN PCIe mit Ethernet zur Datenübertragung kombiniert

Unser Beitrag für die PCI-SIG Virtual Developers Conference 2021 wurde als Artikel in der Zeitschrift Automobil Elektronik abgedruckt.

Auto/TSN ist der Arbeitstitel für eine Technologie, mit der automotive Daten samt PCIe via Time-Sensitive Networking (TSN) übertragen werden können. PCI Express (PCIe) kennen viele Entwickler und Anwender aus dem PC, beispielsweise als Anschluss für die Grafikkarte oder für schnelle NVMe-Massenspeicher. Ebenso bekannt ist Ethernet, mit dem sich zu Hause oder im Büro Rechner und Drucker usw. vernetzen lässt. IEEE Ethernet in Form von 100/1000Base-T1 fährt heute bereits auf der Straße. Aber warum wird PCIe immer mehr ein Thema im Automobil-Bordnetz? Was bedeutet PCIe im Fahrzeug und wie kann PCIe eingesetzt werden, sodass das Gesamtsystem zuverlässig ist?

Hier den ganzen Artikel lesen.

MLE Adds support for Certified Ubuntu 20.04 LTS for Xilinx Device

MLE, a Xilinx Preferred PetaLinux Partner since March 2019, has added support for "Certified Ubuntu 20.04 LTS for Xilinx Device". The Xilinx Certified Ubuntu 20.04 LTS for Xilinx Devices image is an official Ubuntu image with certified hardware support for select Xilinx evaluation boards.


MLE Adds IEEE 1735 IP Encryption to XAUI/RXAUI Products

The IEEE Standard 1735-2014 is to protect 3rd party Intellectual Property (IP) Cores used in Electronic Design Automation (EDA) tool chains. In collaboration with Siemens EDA MLE has added cryptography support when simulating the XAUI/RXAUI IP Core in the Questa Advanced Simulator. Early 2021 Xilinx discontinued the XAUI/RXAUI IP Cores and handed over maintenance and support to MLE.

High-Level Synthesis for Intel and Xilinx FPGAs

High-Level Synthesis (HLS) is a formidable way to design Domain Specific Architecture blocks in FPGA and can enable "cross-compilation" between different FPGA device families and FPGA device vendors. Please read "High-Level Synthesis for Intel and Xilinx FPGAs",  Technical Brief MLE-TB20210707, which describes our findings when using HLS to accelerate a telecommunications network protocol accelerator with FPGA. Please read here.