# NPAP
MLE Releases NPAP TCP/UDP/IP Stack Version 2.4.3
MLE has released an update, Version 2.4.3., of its Network Protocol Acceleration Platform (NPAP). MLE’s Network Protocol Accelerator Platform (NPAP) runs the entire TCP/UDP/IPv4 protocol stack in a digital circuit, i.e.…
MLE Participates at AMD/Xilinx Security Working Group 2024
The AMD-Xilinx Security Working Group takes place face-to-face in Munich, Germany, from December 10-11, 2024. Presentations include the latest security features in Versal Gen 2 and other AMD FPGA families,…
MLE Releases NPAP TCP/UDP/IP Stack Version 2.4.1
MLE has released Version 2.4.1 of its Network Protocol Accelerator Platform (NPAP). NPAP is the TCP/UDP/IP Full Accelerator from Fraunhofer HHI which enjoys production use in FPGA applications for automotive,…
TCP/IP for Real-Time Embedded Systems: The Good, the Bad and the Ugly
Presentation at the Embedded World 2024, Nuremberg, Germany, Apr. 9, 2024 Embedded systems such as in-vehicle networks, modern factory automation or autonomous robots, for example, are undergoing a major shift:…
MLE Updates TCP/UDP/IP Network Protocol Accelerator Platform
MLE has released an update, Version 2.3.3., of its Network Protocol Acceleration Platform (NPAP). This update is fixing minor issues with AXI4 bus scheduler fairness, IP Core packaging for AMD/Xilinx…
MLE and Trenz Verify the AMD/Xilinx Versal™ AI Edge Device and Accelerate Networking and Storage with 10G/25G/50G/100G TCP/IP Core
MLE and Trenz Electronic, both Premier Members of the AMD Adaptive Computing Partner Program, have collaborated and worked on Trenz’s new TE0950 AMD/Xilinx Versal™ AI Edge Evalboard to provide an…
How Bad is TCP? (And What Are the Alternatives?)
Presentation at SNIA Storage Developers Conference, Fremont, CA, Sept. 18-21, 2023 Tail latencies in networking tend to worry us all, whether we implement distributed storage and compute or whether we…
Advantages of Using TCP for GigE Vision Devices
Allied Vision Technologies GmbH in Stadtroda, Germany, has worked with Missing Link Electronics (MLE) to integrate and to optimize MLE NPAP, the TCP/UDP/IP Full Accelerator Stack from Fraunhofer HHI, into…
MLE Updates TCP/UDP/IP Network Protocol Accelerator Platform
MLE has updated NPAP, the Network Protocol Accelerator Platform based on Fraunhofer HHI’s TCP/UDP/IP stack for ASIC and FPGA. Work includes enhancements for performance and interoperability when connecting to Microsoft…
Platform Choices for FPGA-Based In-Network Compute Acceleration
Presentation at SmartNICsSummit 2022, April 26-28, 2022 FPGA-based SmartNICs can provide significant benefits by offloading network data processing off of CPU cores, data-in-motion processing, effectively enabling In-Network Compute. However, FPGA…