# Network Acceleration
High-Level Synthesis for FPGA Implementation of Network Protocols
Presentation at the Embedded World Conference 2015 Combining network protocol acceleration technology from Fraunhofer HHI with Vivado HLS for programming Xilinx Zynq All Programmable SoC. (download slides)
Low-Latency Networking for Systems-of-Systems
Presentation at Embedded World Conference 2014 How hardware acceleration helps reducing latency and increasing bandwith. (download slides)