Low-Latency Networking for Systems-of-Systems
Presentation at Embedded World Conference 2014
How hardware acceleration helps reducing latency and increasing bandwith.
How to evaluate your next IP-Core in the Cloud
Presentation at Embedded World Conference 2014
An overview of how the cloud technology can help you to evaluate your next IP-Core.
Funktionale Sicherheit – Testing unter den Bedingungen der Safety Integrity Levels
Präsentation auf dem Neu-Ulmer Test-Engineering Day
Sebastian Stiemke, MissingLinkElectronics, Neu-Ulm
(German)
Zynq-SoCs mit busfunktionalen Modellen debuggen
Konferenz ARM-Systementwicklung 2013
AXI4 Bus Functional Models (BFM) inside the Cadence Virtual System Platform can ease hardware/software co-debugging of Zynq-7000 All Programmable SoCs (German).
(download slides)
Hybride Apps - DPR und Android auf dem Xilinx ZYNQ
Konferenz ARM-Systementwicklung 2013
How to combine Dynamic Partial Reconfiguration with the Android runtime environment for on-the-fly system updates of Xilinx ZYNQ-7000 All Programmable SoCs (German).
(download slides)
Performanzanalysen von Smart Systems auf Systemebene
Konferenz ARM-Systementwicklung 2013
Tools and methods for measuring system-level performance under Linux (German).
(download paper)
Embedded Systems Realization with Hybrid Apps
DAC 2013
Embedded Systems Realization with Hybrid Apps - Open Source ANDROID Meets Dynamic Partial Reconfiguration
(download slides)
How to counter lifecycle and security challenges for Xilinx All-Programmable Zynq systems.
IO-Link Protocol Stack for a Configurable Microprocessor
Embedded World 2013
IO-Link Protocol Stack for a Configurable Microprocessor
(download slides) (download technical paper)
A detailed overview over the IO-Link Protocol for Smart Sensors
on configurable microprocessors in FPGAs.
Design Choices for FPGA-based SoCs When Adding a SATA Storage
Embedded World 2013
Design Choices for FPGA-based SoCs (download slides)
When Adding a SATA Storage (download technical paper)
Extend the Zynq-7000 All Programmable SoC with SATA SSD storage
by choosing the right performance micro-architecture.
Xilinx XCELL Journal Issue 81
Xperts Corner
Xilinx XCELL Journal, Issue 81, 2012 (download PDF)
Testing and debugging Zynq SoC Designs with bus functional modelings (BFM).