FPGA-Based Hardware Accelerators for 10/40 GigE TCP/IP and Other Protocols

Presentation at the DESY MTCA Workshop for Industry and Research in Hamburg

Hardware-acceleration of networking protocol stacks, enabled to be optimized for specific applications and underlying network protocols, going beyond a state-of-the-art TCP/IP Offload Engine (TOE) and reaching userspace latencies faster than 1 microsecond.

(download slides)