Embedded World Conference 2016

MLE presents "PCI Express over IP, Accelerated - A Low Latency Fabric for System-of-Systems" - presenting a hardware processing solution that transparently tunnels PCI Express transaction-layer packets over TCP/IP.

(download slides) or visit our technical publications.


Embedded World Conference 2016

MLE presents "Designing FPGA-Accelerators for Linux Software Using High-Level Synthesis" - to share hands-on insight and user experience on Xilinx' new SDSoC toolchain.

(download slides) or visit our technical publications.


Embedded World Exhibition 2016

MLE partners with EMCOMO Solutions AG at Booth 2-421 in Hall 2 to offer free advice from our FPGA engineers. In addition, MLE hosts a demo at the Xilinx booth 1-205 in Hall 1 to showcase image processing capability of FPGAs. Stop by or visit one of our presentations at the Embedded World Conference.


Presentation at Micro-TCA Workshop at DESY, Hamburg, Germany

Missing Link Electronics presents a way to minimize userspace latencies via hardware-acceleration of networking protocol stacks.
(download slides) or visit our technical publications.



US Patent 9,209,828 - Configurable Mixed Signal Sxstems

TUE DEC 08 2015

In the area of Mixed Signal Systems, Missing Link Electronics has been awarded US Patent 09,209,828. This patent is titled "Configurable Mixed Signal Systems".



Presentation at the IHK Erfa-Kreis Embedded Systems in Augsburg

Missing Link Electronics presents examples for the prolonged lifespan of FPGA SoCs and embedded systems in a fast-paced CPU market. 
(download slides) or visit our technical publications.



Expansion of MLEs workspace

Missing Link Electronics Germany announces doubling of the research and development space in Neu-Ulm. "The newly acquired premises will help us acommodate more staff and equipment to achieve further progress", says Sebastian Stiemke, Director of Engineering.


Presentation at the Test-Engineering Day in Neu-Ulm

Missing Link Electronics presents an approach to test the hardware of FPGAs and ASICs during the development stage. MLE would like to thank the Ingenieurbüro Paul Huber for hosting the Test Engineering Day this year. (download slides) or visit our technical publications.


Embedded World Exhibition 2015

Fraunhofer HHI and MLE will be available at the Embedded World Exhibition 2015 to discuss benefits of and applications for TCP/UDP/IP Accelerator Technology for FPGAs and ASICs. Please visit us at Booth 4-550 in Hall 4 at the Embedded World Exhibition&Conference 2015.


Embedded World Conference 2015

MLE presents "High-Level Synthesis for FPGA Implementation of Network Protocols" - to demonstrate the benefits of using Xilinx Vivado HLS for implementing network protocols and accelerators efficiently in the Zynq All-Programmable SoC. See Session 17/II at the Embedded World Conference 2015.