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      ASICAMD (Xilinx)AchronixIntel (Altera)LatticeMicrochip (MicroSemi)Other

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      Competence Areas

      From Software to Silicon!

      Computer architecture traditionally focuses on general-purpose processors (CPUs) designed to handle a wide range of tasks. However, the increasing demands of specific applications, like machine learning or network processing, have led to the development of so-called domain-specific architectures (DSAs). DSAs are tailored to excel in a particular domain, often achieving significant performance and energy efficiency gains compared to general-purpose CPUs.

      One technique to improve performance or energy efficiency (or both!) is offloading computationally intensive tasks from the CPU to specialized hardware accelerators. Field-Programmable Gate Arrays (FPGAs) offer a flexible platform for implementing these accelerators, allowing for customization and optimization of the hardware to match the specific algorithms and data structures of the target application. This combination of CPUs and FPGA-based acceleration enables systems to tackle complex workloads more efficiently.
      Open source has revolutionized software development, enabling free use and modification. To minimize costs, risks and ensure compliance in modern automotive, industrial, medical, or telecommunications systems, software reuse is essential. Leveraging existing code, whether open source or internal, reduces development time, bugs, and simplifies meeting legal and security standards.

      MLE has been working on the intersection of those three topics: Domain-Specific Architectures where – mostly open source – software shall be accelerated via the use of FPGAs. Hence, computations move from Software to Silicon!

      MLE’s projects focus on data highways for banks, factories and vehicles which can transport massive amounts of data reliably, safely, securely, and in a timely fashion:

      – Reliability means to protect against data loss to guarantee proper delivery of data, for example by enhancing existing transport protocols such as TCP/IP, or by researching alternatives.

      – Safety means Functional Safety as in ISO 61508 to protect humans from technical malfunctions, for example by redundancies and watchdogs.

      – Security means all data, in motion or at rest, shall be kept private and protected against leakage and tampering, for example, via on-the-fly encryption using post quantum cryptography.

      – Timely means guaranteed worst-case delivery times which are crucial to implement distributed, real-time systems, for example by advancing work on Deterministic Networking, Time-Sensitive Networking and High-Precision, High-Accuracy Time Synchronization. Timely also means improving the Bandwidth-Delay Product and reducing tail-end latencies during transport.

      MLE’s solutions have optimized High-Speed Transport Protocols – using DSAs to reduce transport latency, from milli-seconds down to 100s of nanoseconds. For better applicability, we investigate hybrid solutions where the Linux NAPI collaborates with FPGA NICs (for in-network processing) and modern concepts of FPGA full acceleration. Connectivity for high data rate camera, Lidar, Radar systems to implement massive MIMO sensor systems using de-facto standards like PCIe, MIPI CSI-2, Multi-Gigabit Ethernet. Hardware-accelerated network virtualization by tunneling one packet-based protocol over another packet-based protocol. This facilitates the convergence of IT and OT networks.

      MLE IP Core Design Competence - System Modeling

      System Modeling

      • System-level modeling and validation using IEEE-1666 SystemC
      • Transaction-level modeling for hardware-software co-design
      • Virtual prototyping with Matlab/Simulink
      • Bus-Functional Models (Cadence BFM) for AXI4 On-Chip Interconnect
      • Virtual Prototyping based on QEMU and/or Cadence VSP using SystemC
      MLE IP Core Design Competence - System Architecture Design

      System Architecture Design

      • Multi-processor embedded systems design
      • Hardware / Software Co-Design
      • Hardware acceleration of software algorithms
      • Hardware and software design for audio/video/multi-media applications
      • Distributed networks such as CAN, LIN, and others
      • Heterogeneous compute architecures
      • Streaming media architecture
      • Single- and multi-channel Direct Memory Access (DMA)
      • Machine vision systems with open Computer Vision (opencv.org)
      • Machine learning using reduced precision neural networks
      MLE IP Core Design Competence - FPGA Design

      FPGA Design

      • Altera, Lattice, MicroSemi and Xilinx tool chain
      • High-Level Synthesis with design entry using C/C++/SystemC
      • Xilinx SDSoC software acceleration methodology
      • Register-Transfer Level (RTL) design in IEEE-1076 VHDL and IEEE-1364 Verilog HDL and
      • RTL verification and testbench design
      • RTL simulation using state-of-the-art tools such as Xilinx ISim or ModelSim / Questa
      • Clock Domain Crossing (CDC) design & analysis
      • Timing Analysis and Timing Closure
      • AXI4 On-Chip Interconnect for regular, lite and streaming
      • Multi-gigabit transceiver parameterization & integration
      • Multi-chip connectivity via AURORA protocol
      • Rapid hardware prototyping
      MLE IP Core Design Competence - Software Engineering

      Software Engineering

      • Complex software architecture and algorithm design
      • Programming in C, C++, Java under UNIX and Windows operating systems
      • Embedded Linux software development
      • Software development with automotive OSEK OS
      • Software development and debugging for embedded micro-processors such as
      • Graphical User Interface (GUI) design with Python TK, Tcl/Tk
      • Multi-threaded applications and GUI design using QT
      MLE IP Core Design Competence - Hardware and Low-level System Design, Integration and Test

      Hardware and Low-level System Design, Integration and Test

      • Complete PCB-development covering
      • Conceptional works and system dimensioning
      • System bring-up and characterization
      • Micro-TCA Off-the-shelf components for rugged / rapid protoyping
      MLE IP Core Design Competence - Design Processes and Methodologies

      Design Processes and Methodologies

      • Automatic Build Environments, like Jenkins or buildbot, for consistent concurrent development of hardware (FPGA) and software (device drivers and applications)
      • Diligent use of version control, release management and issue tracking
      • Design for Safety-Integrity Levels
      • System-level security
      MLE IP Core Design Competences - Storage Protocols (Host- and Device-side)

      Storage Protocols (Host- and Device-side)

      • Serial ATA (SATA)
      • Serial Attached SCSI (SAS)
      • Non-Volatile Memory Express (NVMe)
      • Universal Flash Storage (UFS)
      MLE IP Core Design Competences - PCI Express

      PCI Express

      • PCIe standards Gen1, Gen2, Gen3, Gen4
      • Hardware and software development for End-point and Root-Complex, NTB
      • Linux device driver development
      MLE IP Core Design Competences - High-speed Analog I/O

      High-speed Analog I/O

      • JESD 204B connectivity IP
      • Subclass 0, subclass 1
      • Parallel or serial interfaces to analog-to-digital converters (ADC) and digital-to-analog converters (DAC)
      • Delta-Sigma converters
      MLE IP Core Design Competences - Multi-media Protocols

      Multi-media Protocols

      • Serial Digital Interface (SDI)
      • LVDS-based Custom Camera Interfaces with Clock Recovery
      • High-Definition Multimedia Interface (HDMI) wired and wireless
      • Audio-Video Broadcast (AVB)
      MLE IP Core Design Competences - Networking

      Networking