System Modeling

• System-level modeling and validation using IEEE-1666 SystemC
• Transaction-level modeling for hardware-software co-design
• Virtual prototyping with Matlab/Simulink
• Bus-Functional Models (Cadence BFM) for AXI4 On-Chip Interconnect
• Virtual Prototyping based on QEMU and/or Cadence VSP using SystemC

System Architecture Design

• Multi-processor embedded systems design
• Hardware / Software Co-Design
• Hardware acceleration of software algorithms
• Hardware and software design for audio/video/multi-media applications
• Distributed networks such as CAN, LIN, and others
• Heterogeneous compute architecures
• Streaming media architecture
• Single- and multi-channel Direct Memory Access (DMA)
• Machine vision systems with open Computer Vision (opencv.org)
• Machine learning using reduced precision neural networks

FPGA Design

• Altera, Lattice, MicroSemi and Xilinx tool chain
• High-Level Synthesis with design entry using C/C++/SystemC
• Xilinx SDSoC software acceleration methodology
• Register-Transfer Level (RTL) design in IEEE-1076 VHDL and IEEE-1364 Verilog HDL and
• RTL verification and testbench design
• RTL simulation using state-of-the-art tools such as Xilinx ISim or ModelSim / Questa
• Clock Domain Crossing (CDC) design & analysis
• Timing Analysis and Timing Closure
• AXI4 On-Chip Interconnect for regular, lite and streaming
• Multi-gigabit transceiver parameterization & integration
• Multi-chip connectivity via AURORA protocol
• Rapid hardware prototyping

Software Engineering

• Complex software architecture and algorithm design
• Programming in C, C++, Java under UNIX and Windows operating systems
• Embedded Linux software development
• Software development with automotive OSEK OS
• Software development and debugging for embedded micro-processors such as
  • ARM v7 v8
  • Intel ATOM
  • Altera Nios II
  • Xilinx MicroBlaze
  • PowerPC
• Graphical User Interface (GUI) design with Python TK, Tcl/Tk
• Multi-threaded applications and GUI design using QT