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      News

      MLE continues to work with a wide range of partners to develop advanced FPGA-based networking and storage applications, as well as to share our experience and latest research results in seminars as well as webinars. Here we share our latest news and events.

      MLE Releases 10/25 Gig Ethernet NPAP for Intel Stratix 10 FPGAs

      MLE Releases 10/25 Gig Ethernet NPAP for Intel Stratix 10 FPGAs

      Feb 9, 20204 years ago

      With great support from the Intel PSG Team Europe, MLE has ported the 10/25 Gigabit Ethernet Network Protocol Acceleration Platform (NPAP) based on the TCP/UDP/IP Network Protocol Accelerator from Fraunhofer…

      MLE Releases OP-TEE Free Open-Source Edition

      MLE Releases OP-TEE Free Open-Source Edition

      Jan 31, 20204 years ago

      Following a successful review by the Xilinx Security Center-of-Excellence, MLE now releases the OP-TEE Free Open-Source Edition for the Zynq UltraScale+ MPSoC and RFSoC devices from Xilinx (ZynqMP). OP-TEE is…

      Xilinx Blog Features Vivado Build System from MLE

      Xilinx Blog Features Vivado Build System from MLE

      Jan 27, 20205 years ago

      The automated Vivado Build System, open-sourced by MLE to increase FPGA design productivity, is featured in the Xilinx Blog. This collection of scripts facilitates Continuous Integration (CI), and ensures fully…

      MLE Releases NVMe Streamer

      MLE Releases NVMe Streamer

      Jan 13, 20205 years ago

      MLE releases NVMe Streamer which is a so-called Full Accelerator NVMe host subsystem integrated into FPGAs. NVMe Streamer offloads the NVMe protocol into programmable logic and enables to stream data…

      US Patent 10,509,880 for Design Automation for Configurable Mixed-Signal Systems

      US Patent 10,509,880 for Design Automation for Configurable Mixed-Signal Systems

      Dec 17, 20195 years ago

      Missing Link Electronics has been awarded another patent in the field of mixed-signal: US Patent 10,509,880 B2 was issued DEC 17 2019 and claims novel Electronic Design Automation (EDA) methods…

      MLE Open-Sources Build System for Xilinx Vivado

      MLE Open-Sources Build System for Xilinx Vivado

      Nov 25, 20195 years ago

      To facilitate an FPGA Build Environment which can be automated, for example for Continuous Integration (CI), and which ensures fully reproducible results later in the development and product lifecycle, the…

      MLE Presents Xilinx Alveo-based Acceleration for Automotive Test Equipment

      MLE Presents Xilinx Alveo-based Acceleration for Automotive Test Equipment

      Nov 12, 20195 years ago

      November 12-13, 2019, Missing Link Electronics, a Xilinx Alveo Independent Software Vendor (ISV), exhibits at the Xilinx Developers Forum Europe (XDF). Alveo Accelerators for Key-Value-Store (KVS), Data-in-Motion labelling, compression and…

      MLE Silver Sponsor of Xilinx Developers Forum 2019 in San Jose, CA

      MLE Silver Sponsor of Xilinx Developers Forum 2019 in San Jose, CA

      Sep 17, 20195 years ago

      October 1-2, 2019, Missing Link Electronics is a Silver Sponsor of the Xilinx Developers Forum (XDF) in San Jose, CA, where we will be presenting solutions for FPGA Acceleration and…

      3rd Workshop “Programmable Processing for the Autonomous / Connected Vehicle”

      3rd Workshop “Programmable Processing for the Autonomous / Connected Vehicle”

      Jun 12, 20195 years ago

      On July 17th 2019 the 3rd workshop on using FPGAs and ACAP for automotive ADAS and autonomous vehicles took place. Once more it was an excellent event with high-quality presentations…

      Lunch & Learn at EDA Direct Tuesday June 25th, 2019

      Lunch & Learn at EDA Direct Tuesday June 25th, 2019

      Jun 11, 20195 years ago

      MLE will participate in “Designing High-Performance ECU and Signal Integrity Analysis in Autonomous Vehicles” at a Lunch & Learn organized by EDA Direct. Read the MLE Technical Brief Tool Options…