News
MLE continues to work with a wide range of partners to develop advanced FPGA-based networking and storage applications, as well as to share our experience and latest research results in seminars as well as webinars. Here we share our latest news and events.
MLE Becomes Premier MicroSemi Design Partner
MLE has joined the Microchip Ecosystem as a Premier Design Partner. "Our customers have asked us to extend MLE's design services to include MicroSemi's FPGA families. In particular for industrial…
MLE Supports PCO with TCP/IP for Camera Systems
MLE has been providing to PCO a connectivity solution based on the Network Protocol Acceleration Platform from Fraunhofer HHI. The key objective is to scale along with increasing image sensor…
MLE Joins Github Project CORUNDUM for In-Network Compute
CORUNDUM.io is an open-source project hosted at Github for building high-performance FPGA-based Network-Interface Cards (NIC) or in-network compute platforms / SmartNICs. “Our motivation for joining is to build better and…
Wie Auto-TSN PCIe mit Ethernet zur Datenübertragung kombiniert
Unser Beitrag für die PCI-SIG Virtual Developers Conference 2021 wurde als Artikel in der Zeitschrift Automobil Elektronik abgedruckt. Auto/TSN ist der Arbeitstitel für eine Technologie, mit der automotive Daten samt…
MLE Adds support for Certified Ubuntu 20.04 LTS for Xilinx Device
MLE, a Xilinx Preferred PetaLinux Partner since March 2019, has added support for “Certified Ubuntu 20.04 LTS for Xilinx Device“. The Xilinx Certified Ubuntu 20.04 LTS for Xilinx Devices image…
MLE Adds IEEE 1735 IP Encryption to XAUI/RXAUI Products
The IEEE Standard 1735-2014 is to protect 3rd party Intellectual Property (IP) Cores used in Electronic Design Automation (EDA) tool chains. In collaboration with Siemens EDA MLE has added cryptography…
High-Level Synthesis for Intel and Xilinx FPGAs
High-Level Synthesis (HLS) is a formidable way to design Domain Specific Architecture blocks in FPGA and can enable “cross-compilation” between different FPGA device families and FPGA device vendors. Please read…
Zone-Based Automotive Backbones Tunneling PCIe
Missing Link Electronics (MLE) announced today that they are partnering with Fraunhofer Heinrich-Hertz-Institute (HHI) and Fraunhofer Institute for Photonic Microsystems (IPMS) on ultra-reliable, deterministic low-latency transports for automotive networks tunneling…
Xilinx Adapt EMEA: Automotive, May 18-19, 2021
MLE will present "Zone-Based Architectures with Auto/TSN on Zynq UltraScale+ MPSoC" at the Xilinx Adapt EMEA: Automotive. This is organized as a Virtual Technical Event in the mornings of May…
PCI-SIG Virtual Developers Conference 2021
MLE participated as sponsor and as a presenter of “Zone-Based Automotive Backbones Tunneling PCIe” at the PCI-SIG Virtual Developers Conference 2021. (download slides) or visit our technical publications