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      NPAP RTL Simulation Demonstrates Low-Latency TCP/IP

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      MLE has complemented NPAP, the TCP/UDP/IP Full Accelerator from Fraunhofer HHI, with an RTL Simulation environment for Xilinx Vivado ISim and for the Questa Advanced Simulator from Siemens EDA. This simulation environment is available free-of-charge to all licensees of NPAP with an active maintenance subscription. For more information please read the MLE Technical Brief TB20220305 titled “Latency Measurement of 10G/25G/50G/100G TCP-Cores Using RTL Simulation”.