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      Composable Edge Cloud Systems With NVMe-over-5G URLLC

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      Presentation at Embedded World 2023, Nuremberg, Germany

      5G Radio addresses machine-type communication with low energy demands. 5G Edge Clouds reduce processing latency by bringing extra compute close to the “edge”. To be cost efficient, Edge Cloud systems are implemented following modern datacenter technology, such as NVMe. NVMe uses PCIe. PCIe typically is implemented for short-range up to 30 cm but for composability, there is so-called NVMe-over-Fabric built on top of PCIe Long-Range Tunnel.

      Composable Edge Cloud Systems With NVMe-over-5G URLLC

      With 3GPP Release 15 5G Radio starts meeting the requirements for implementing such PCIe Long-Range Tunnel, enabling the design of composable Edge Cloud Storage over 5G.

      Our presentation at Embedded World 2023 demonstrates a proof-of-concept “NVMe-over-5G” implementation along with a methodology for detailed latency analysis. We start with key aspects of 5G URLLC, PCIe and Long-Range PCIe, followed by introducing NVMe and composable Datacenter architectures. We then present our setup NVMe-over-5G running on the experimental 5G system at Fraunhofer and TU Berlin. We use COTS hardware comprising AMD/Xilinx Ultrascale+ MPSoC and 5G modems to connect a standard NVMe SSD with a standard CPU running Linux and the NVMe protocol. We discuss latency numbers, i.e. how much each intermediate component contributes to the total PCIe NVMe end-to-end latency. Our findings show that in general 5G URLLC can meet the PCIe/NVMe requirements, as long as certain optimizations are implemented, to reduce tail-end latency.

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      Converging PCIe and TSN Ethernet for Composable Infrastructure in High-Performance In-Vehicle Embedded Systems

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      Presentation at SNIA Storage Developers Conference, San Jose, Sept. 12-15, 2022

      Costs and risks of implementing High-Performance Embedded Systems such as Centralized Car Servers for Autonomous Vehicles can be reduced when borrowing from modern datacenter technology. Therefore, PCIe and Multi-Gigabit Ethernet have become a foundation for automotive in-vehicle infrastructure. Together with partner Fraunhofer IPMS, MLE describes the needs of modern automotive networking and storage architectures, and will share approaches for converging (real-time) Ethernet and PCIe as a common fabric for reliable and cost-efficient implementations. First performance results of a proof-of-concept implementation are shown.

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      10 GigE TCP/IP Stack for High-Speed Camera Transport

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      Presentation at FPGA Conference Europe in Munich, Germany, July 5-7, 2022

      MLE presents NPAP, a TCP/IP full accelerator from Fraunhofer HHI, for use in Multi-Gigabit High-Speed Camera Image Transport. With increasing resolution and faster frame-rates in cameras and other image sensors, current standards such as GigEVision are running out of steam. Furthermore, modern “down-stream” image processing based on Artificial Intelligence relies on loss-less transport of pixels, lines and entire image frames. This presentation goes into the details of TCP/IP as a reliable, loss-less transport and closes with an implementation example using MicroChip PolarFire FPGA.

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      Zone-Based Automotive-Backbones

      Presentation at Automotive Ethernet Congress in Munich, Germany, June 1-2, 2022

      Fraunhofer IPMS and MLE present a joint work on how to combine TSN Ethernet and TCP/IP as an ultra-reliable deterministic low-latency transport for tunneling PCIe and other protocols for long-reach. Ethernet has emerged as the connectivity technology of choice. Since real-time networks are particularly necessary for security-critical applications such as ADAS, the emerging IEEE standard “Time Sensitive Networking” becomes an ideal network. Automotive Zone Gateways can be linked together via TSN implementing real-time automotive 10G/25G Ethernet. This creates a need for “tunneling” PCIe over TSN, supporting CPU-to-CPU communication (PCIe NTB) and NVMe storage. Through the use of TSN, data rates of 10 & 25 Gbit / s in the backbone and the high degree of integration of the solution, large amounts of data can be transported and, at the same time, time-critical data traffic with guaranteed latencies can be separated from less time-critical or background data traffic.

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      Platform Choices for FPGA-Based In-Network Compute Acceleration

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      Presentation at SmartNICsSummit 2022, April 26-28, 2022

      FPGA-based SmartNICs can provide significant benefits by offloading network data processing off of CPU cores, data-in-motion processing, effectively enabling In-Network Compute. However, FPGA programming requires special skill sets to render predictable quality results. Open and open-source platforms such as NPAP or CORUNDUM or AMD OpenNIC or Intel IOFS can reduce the costs and risks when implementing FPGA-based SmartNICs. This is a joint presentation between MLE and UC San Diego, Dr. Alex Forencich.

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      CORUNDUM – From a NIC to a Platform for In-Network Compute

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      Presentation at FOSDEM’22, February 5-6, 2022

      This joint presentation between Alex Forencich, UC San Diego, and Ulrich Langenbach, MLE, provides an introduction to the corundum project, implementing a 100 GbE NIC based on Commercial-off-the-shelf (COTS) FPGA cards, e.g. Xilinx Alveo. The project consists of all necessary RTL components, e.g. PCIe DMA engine, NIC datapath, MAC, PHY and integration of vendor specific IP cores, such as transceivers and PCIe hard-IP cores. In combination with the provided driver and debugging utility the ready-to-experiment state just requires a supported FPGA card + compiler to kick-off playing with the project.

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      Zone-Based Automotive Backbones Tunneling PCIe

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      Presentation at PCI-SIG Virtual Developers Conference 2021, May 25-26

      The need for more safe and eco-friendly vehicles drives automotive connectivity towards so-called Zone-Based Architectures. Inside those so-called Zone Gateways PCIe technology provides the connectivity between multiple System-on-Chip (SoC), CPUs, GPUs, and FPGAs for scalable performance. Within the automotive network, multiple Zone Gateways connect with each other via the emerging IEEE standards “Time Sensitive Networking” (TSN).
      Today, Fraunhofer and MLE can provide a working proof-of-concept in form of a digital circuit & system stack which encapsulates and decapsulates PCIe packets (and other protocols) over real-time automotive TSN Ethernet and which scales up to 100 Gbps.

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      PCIe-over-TCP-over-TSN-over-10/25GigE

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      Presentation at 4th Workshop “Programmable Processing for the Autonomous / Connected Vehicle”, Sept. 24, 2020 at TH Ulm, Germany

      ADAS and Autonomous Driving push the migration towards Zone-based architectures, which again push for more bandwidth and real-time capabilities in the Automotive Network. Based on open IEEE standards and a unique combination of technology from Fraunhofer Heinrich-Hertz-Institute, from Fraunhofer Institute for Photonic Microsystems and from Missing Link Electronics, PCI Express, and other protocols, can be transported in real-time at datarates of 10 Gbps, and more.

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