Missing Link Electronics presents examples for the prolonged lifespan of FPGA SoCs and embedded systems in a fast-paced CPU market.
(download slides) or visit our technical publications.
Missing Link Electronics Germany announces doubling of the research and development space in Neu-Ulm. “The newly acquired premises will help us acommodate more staff and equipment to achieve further progress”, says Sebastian Stiemke, Director of Engineering.
Missing Link Electronics presents an approach to test the hardware of FPGAs and ASICs during the development stage. MLE would like to thank the Ingenieurbüro Paul Huber for hosting the Test Engineering Day this year. (download slides) or visit our technical publications.
Fraunhofer HHI and MLE will be available at the Embedded World Exhibition 2015 to discuss benefits of and applications for TCP/UDP/IP Accelerator Technology for FPGAs and ASICs. Please visit us at Booth 4-550 in Hall 4 at the Embedded World Exhibition&Conference 2015.
MLE presents “High-Level Synthesis for FPGA Implementation of Network Protocols” – to demonstrate the benefits of using Xilinx Vivado HLS for implementing network protocols and accelerators efficiently in the Zynq All-Programmable SoC. See Session 17/II at the Embedded World Conference 2015.
To ease integration of USB Host functionality for FPGA MLE has released the XPS USB Host Controller Developer’s Guide. Foundation is the XPS_USB_Host Controller Linux Reference Design from MLE. Using this reference design the various modes of USB can be evaluated based on some basic and easy to reproduce test-cases. This highlights how the XPS_USB_HOST Controller IP Core operates in conjunction with Linux running on an embedded CPU (Xilinx MicroBlaze or PowerPC) inside a Xilinx FPGA device.
MLE has released Revision 2.00a of the XPS USB 2.0 EHCI Host Controller. Originally from Xilinx, Xilinx handed over service and support to MLE in 2011. The USB 2.0 Host Controller allows users to connect Spartan-6 FPGAs or 7-series FPGAs to full-speed and high-speed USB devices for human-machine interface applications, cameras and storage. An AXI4-based Petalinux reference design ships in Q1, 2015. Please find more information here.
MLE presents High-Level Synthesis design flows for Xilinx Zynq using Vivado HLS at the Konferenz für ARM-Systementwicklung 2014 in Munich, Germany.
TQ-Systems wireless HD-video interface enables you to transmit uncompressed full HD-Video data up to 1080p60 using license free 5 GHz band and without line of sight.
TQ-Systems’ technology creates a radio standard that achieves the outstanding video quality of the HDMIT and 3G-SDI used on cable – without video delay (lip syncing) and with low energy consumption. [http://www.modul-number-one.de/modul-no-1.html]
“MLE supported us in getting the maximum out of the selected FPGA device, including timing-closure at HD-SDI speeds. Their anti-jitter solution could be added to the target design, which allows us to reduce the BoM while delivering signal quality according to SMPTE standards.” says Harald Kaderabek, Head of R&D at TQ-Systems Durach.
TQ-Systems Durach GmbH, formerly known as SRI Radio Systems GmbH, is part of the TQ-Group, a group of companies which provides extensive system services right from the idea to the finished product.